Retrieved from DBLP. Full publications is available at Google Scholar.

Journals

  1. Ching-Hao Chiu, Yu-Jen Chen, Yawen Wu, Yiyu Shi, and Tsung-Yi Ho. “Achieve fairness without demographics for dermatological disease diagnosis.” Medical Image Anal. (2024)
  2. Weiqing Ji, Xingzhuo Guo, Shouan Pan, Fei Long, Tsung-Yi Ho, Ulf Schlichtmann, and Hailong Yao. “GNN-Based Concentration Prediction With Variable Input Flow Rates for Microfluidic Mixers.” IEEE Trans. Biomed. Circuits Syst. (2024)
  3. Xing Huang, Huayang Cai, Wenzhong Guo, Genggeng Liu, Tsung-Yi Ho, Krishnendu Chakrabarty, and Ulf Schlichtmann. “Control-Logic Synthesis of Fully Programmable Valve Array Using Reinforcement Learning.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2024)
  4. Shixin Chen, Shanyi Li, Zhen Zhuang, Su Zheng, Zheng Liang, Tsung-Yi Ho, Bei Yu, and Alberto L. Sangiovanni-Vincentelli. “Floorplet: Performance-Aware Floorplan Framework for Chiplet Integration.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2024)
  5. Youlin Pan, Genggeng Liu, Xing Huang, Zipeng Li, Hsin-Chuan Huang, Chi-Chun Liang, Qining Wang, Chang-Jin Kim, and Tsung-Yi Ho. “NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2024)
  6. Yung-Chen Tang, Pin-Yu Chen, and Tsung-Yi Ho. “Neural Clamping: Joint Input Perturbation and Temperature Scaling for Neural Network Calibration.” Trans. Mach. Learn. Res. (2024)
  7. Tung-Che Liang, Yi-Chen Chang, Zhanwei Zhong, Yaas Bigdeli, Tsung-Yi Ho, Krishnendu Chakrabarty, and Richard B. Fair. “Dynamic Adaptation Using Deep Reinforcement Learning for Digital Microfluidic Biochips.” ACM Trans. Design Autom. Electr. Syst. (2024)
  8. Jian-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, and Tsung-Yi Ho. “Design-for-reliability and on-the-fly fault tolerance procedure for paper-based digital microfluidic biochips with multiple faults.” Integr. (2023)
  9. Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Lu Wang, Qingshan Li, Robert Wille, Tsung-Yi Ho, and Ulf Schlichtmann. “Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2023)
  10. Chen Jiang, Rongquan Yang, Qi Xu, Hailong Yao, Tsung-Yi Ho, and Bo Yuan. “A Cooperative Multiagent Reinforcement Learning Framework for Droplet Routing in Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2023)
  11. Xing Huang, Tsung-Yi Ho, Wenzhong Guo, Bing Li, Krishnendu Chakrabarty, and Ulf Schlichtmann. “Computer-aided Design Techniques for Flow-based Microfluidic Lab-on-a-chip Systems.” ACM Comput. Surv. (2022)
  12. Yifang Bao, Shigeru Yamashita, Bing Li, and Tsung-Yi Ho. “Mixer-Based Washing Methods for Programmable Microfluidic Devices.” IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2022)
  13. Yier Jin, Tsung-Yi Ho, Stjepan Picek, and Siddharth Garg. “Guest Editorial: Trustworthy AI.” ACM J. Emerg. Technol. Comput. Syst. (2022)
  14. Xing Huang, Wenzhong Guo, Zhisheng Chen, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization.” IEEE Trans. Computers (2022)
  15. Rongliang Fu, Junying Huang, Haibin Wu, Xiaochun Ye, Dongrui Fan, and Tsung-Yi Ho. “JBNN: A Hardware Design for Binarized Neural Networks Using Single-Flux-Quantum Circuits.” IEEE Trans. Computers (2022)
  16. Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, and Ulf Schlichtmann. “PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2022)
  17. Hui-Chieh Yu, Yu-Huei Lin, Zhiyang Chen, Bing Li, Xing Huang, Ulf Schlichtmann, Tsung-Yi Ho, and Hailong Yao. “Contamination-Aware Synthesis for Programmable Microfluidic Devices.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2022)
  18. Xing Huang, Tsung-Yi Ho, Zepeng Li, Genggeng Liu, Lu Wang, Qingshan Li, Wenzhong Guo, Bing Li, and Ulf Schlichtmann. “MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2022)
  19. Sudip Poddar, Sukanta Bhattacharjee, Shao-Yun Fang, Tsung-Yi Ho, and Bhargab B. Bhattacharya. “Demand-Driven Multi-Target Sample Preparation on Resource-Constrained Digital Microfluidic Biochips.” ACM Trans. Design Autom. Electr. Syst. (2022)
  20. Chunfeng Liu, Xing Huang, Bing Li, Hailong Yao, Paul Pop, Tsung-Yi Ho, and Ulf Schlichtmann. “DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2021)
  21. Mingyang Kou, Pei-Yi Cheng, Jun Zeng, Tsung-Yi Ho, Kazuyoshi Takagi, and Hailong Yao. “Splitter-Aware Multiterminal Routing With Length-Matching Constraint for RSFQ Circuits.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2021)
  22. Chen Jiang, Bo Yuan, Tsung-Yi Ho, and Xin Yao. “Placement of Digital Microfluidic Biochips via a New Evolutionary Algorithm.” ACM Trans. Design Autom. Electr. Syst. (2021)
  23. Jiayi Weng, Tsung-Yi Ho, Weiqing Ji, Peng Liu, Mengdi Bao, and Hailong Yao. “URBER: Ultrafast Rule-Based Escape Routing Method for Large-Scale Sample Delivery Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
  24. Qin Wang, Ulf Schlichtmann, Yici Cai, Weiqing Ji, Zeyan Li, Haena Cheong, Oh-Sun Kwon, Hailong Yao, Tsung-Yi Ho, Kwanwoo Shin, and Bing Li. “Integrated Control-Fluidic Codesign Methodology for Paper-Based Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
  25. Xing Huang, Tsung-Yi Ho, Krishnendu Chakrabarty, and Wenzhong Guo. “Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
  26. Ying Zhu, Xing Huang, Bing Li, Tsung-Yi Ho, Qin Wang, Hailong Yao, Robert Wille, and Ulf Schlichtmann. “Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
  27. Chunfeng Liu, Bing Li, Bhargab B. Bhattacharya, Krishnendu Chakrabarty, Tsung-Yi Ho, and Ulf Schlichtmann. “Test Generation for Flow-Based Microfluidic Biochips With General Architectures.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
  28. Weiqing Ji, Tsung-Yi Ho, Junchao Wang, and Hailong Yao. “Microfluidic Design for Concentration Gradient Generation Using Artificial Neural Network.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
  29. Tung-Che Liang, Yun-Sheng Chan, Tsung-Yi Ho, Krishnendu Chakrabarty, and Chen-Yi Lee. “Multitarget Sample Preparation Using MEDA Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
  30. Lingxuan Shao, Wentai Li, Tsung-Yi Ho, Sudip Roy, and Hailong Yao. “Lookup Table-Based Fast Reliability-Aware Sample Preparation Using Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
  31. Yajun Yang, Zhang Chen, Yuan Liu, Tsung-Yi Ho, Yier Jin, and Pingqiang Zhou. “How Secure Is Split Manufacturing in Preventing Hardware Trojan?.” ACM Trans. Design Autom. Electr. Syst. (2020)
  32. Varsha Agarwal, Ananya Singla, Mahammad Samiuddin, Sudip Roy, Tsung-Yi Ho, Indranil Sengupta, and Bhargab B. Bhattacharya. “Scheduling algorithms for reservoir- and mixer-aware sample preparation with microfluidic biochips.” Integr. (2019)
  33. Jian-De Li, Chun-Hao Kuo, Guan-Ruei Lu, Sying-Jyan Wang, Katherine Shu-Min Li, Tsung-Yi Ho, Hung-Ming Chen, and Shiyan Hu. “Co-placement optimization in sensor-reusable cyber-physical digital microfluidic biochips.” Microelectron. J. (2019)
  34. Zhanwei Zhong, Zipeng Li, Krishnendu Chakrabarty, Tsung-Yi Ho, and Chen-Yi Lee. “Micro-Electrode-Dot-Array Digital Microfluidic Biochips: Technology, Design Automation, and Test Techniques.” IEEE Trans. Biomed. Circuits Syst. (2019)
  35. Sukanta Bhattacharjee, Ansuman Banerjee, Tsung-Yi Ho, Krishnendu Chakrabarty, and Bhargab B. Bhattacharya. “Efficient Generation of Dilution Gradients With Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2019)
  36. Qinghang Zhao, Wenyu Sun, Jiaqing Zhao, Jian Zhao, Hailong Yao, Tsung-Yi Ho, Xiaojun Guo, Huazhong Yang, and Yongpan Liu. “Design Methodology for TFT-Based Pseudo-CMOS Logic Array With Multilayer Interconnection Architecture and Optimization Algorithms.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2019)
  37. Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, and Stacey Weber. “Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory.” IEEE Trans. Very Large Scale Integr. Syst. (2019)
  38. Krishnendu Chakrabarty, Tsung-Yi Ho, Hai Li, and Ulf Schlichtmann. “Emerging Hardware Techniques and EDA Methodologies for Neuromorphic Computing (Dagstuhl Seminar 19152).” Dagstuhl Reports (2019)
  39. Guan-Ruei Lu, Ansuman Banerjee, Bhargab B. Bhattacharya, Tsung-Yi Ho, and Hung-Ming Chen. “Reliability Hardening Mechanisms in Cyber-Physical Digital-Microfluidic Biochips.” ACM J. Emerg. Technol. Comput. Syst. (2018)
  40. Zipeng Li, Kelvin Yi-Tse Lai, John McCrone, Po-Hsien Yu, Krishnendu Chakrabarty, Miroslav Pajic, Tsung-Yi Ho, and Chen-Yi Lee. “Efficient and Adaptive Error Recovery in a Micro-Electrode-Dot-Array Digital Microfluidic Biochip.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
  41. Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho, and Chen-Yi Lee. “Structural and Functional Test Methods for Micro-Electrode-Dot-Array Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
  42. Qin Wang, Hao Zou, Hailong Yao, Tsung-Yi Ho, Robert Wille, and Yici Cai. “Physical Co-Design of Flow and Control Layers for Flow-Based Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
  43. Tsun-Ming Tseng, Mengchu Li, Daniel Nestor Freitas, Travis McAuley, Bing Li, Tsung-Yi Ho, Ismail Emre Araci, and Ulf Schlichtmann. “Columba 2.0: A Co-Layout Synthesis Tool for Continuous-Flow Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
  44. Kailin Yang, Hailong Yao, Tsung-Yi Ho, Kunze Xin, and Yici Cai. “AARF: Any-Angle Routing for Flow-Based Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
  45. Wen-Chun Chung, Pei-Yi Cheng, Zipeng Li, and Tsung-Yi Ho. “Module Placement under Completion-Time Uncertainty in Micro-Electrode-Dot-Array Digital Microfluidic Biochips.” IEEE Trans. Multi Scale Comput. Syst. (2018)
  46. Guan-Ruei Lu, Chun-Hao Kuo, Kuen-Cheng Chiang, Ansuman Banerjee, Bhargab B. Bhattacharya, Tsung-Yi Ho, and Hung-Ming Chen. “Flexible Droplet Routing in Active Matrix-Based Digital Microfluidic Biochips.” ACM Trans. Design Autom. Electr. Syst. (2018)
  47. Tsung-Yi Ho, and Baris Taskin. “Special issue on IEEE/ACM System Level Interconnect Prediction (SLIP) Workshop 2016.” Integr. (2017)
  48. Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho, and Chen-Yi Lee. “Droplet Size-Aware High-Level Synthesis for Micro-Electrode-Dot-Array Digital Microfluidic Biochips.” IEEE Trans. Biomed. Circuits Syst. (2017)
  49. Zipeng Li, Kelvin Yi-Tse Lai, Krishnendu Chakrabarty, Tsung-Yi Ho, and Chen-Yi Lee. “Droplet Size-Aware and Error-Correcting Sample Preparation Using Micro-Electrode-Dot-Array Digital Microfluidic Biochips.” IEEE Trans. Biomed. Circuits Syst. (2017)
  50. Qin Wang, Yue Xu, Shiliang Zuo, Hailong Yao, Tsung-Yi Ho, Bing Li, Ulf Schlichtmann, and Yici Cai. “Pressure-Aware Control Layer Optimization for Flow-Based Microfluidic Biochips.” IEEE Trans. Biomed. Circuits Syst. (2017)
  51. Kai Hu, Trung Anh Dinh, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Control-Layer Routing and Control-Pin Minimization for Flow-Based Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2017)
  52. Sukanta Bhattacharjee, Sharbatanu Chatterjee, Ansuman Banerjee, Tsung-Yi Ho, Krishnendu Chakrabarty, and Bhargab B. Bhattacharya. “Adaptation of Biochemical Protocols to Handle Technology-Change for Digital Microfluidics.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2017)
  53. Ta-Yang Huang, Chia-Jui Chang, Chung-Wei Lin, Sudip Roy, and Tsung-Yi Ho. “Delay-Bounded Intravehicle Network Routing Algorithm for Minimization of Wiring Weight and Wireless Transmit Power.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2017)
  54. Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark M. Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, and Stacey Weber Jackson. “Editorial.” IEEE Trans. Very Large Scale Integr. Syst. (2017)
  55. Shigeru Yamashita, Tsung-Yi Ho, Robert Wille, and Krishnendu Chakrabarty. “Microfluidic Biochips: Bridging Biochemistry with Computer Science and Engineering (NII Shonan Meeting 2017-1).” NII Shonan Meet. Rep. (2017)
  56. Trung Anh Dinh, Shigeru Yamashita, and Tsung-Yi Ho. “A Full-Flexibility-Guaranteed Pin-Count Reduction Design for General-Purpose Digital Microfluidic Biochips.” IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2016)
  57. Kai Hu, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Wash Optimization and Analysis for Cross-Contamination Removal Under Physical Constraints in Flow-Based Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2016)
  58. Hailong Yao, Qin Wang, Yiren Shen, Tsung-Yi Ho, and Yici Cai. “Integrated Functional and Washing Routing Optimization for Cross-Contamination Removal in Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2016)
  59. Tsun-Ming Tseng, Bing Li, Mengchu Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Reliability-Aware Synthesis With Dynamic Device Mapping and Fluid Routing for Flow-Based Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2016)
  60. Yang Liu, Shiyan Hu, and Tsung-Yi Ho. “Leveraging Strategic Detection Techniques for Smart Home Pricing Cyberattacks.” IEEE Trans. Dependable Secur. Comput. (2016)
  61. Zipeng Li, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Optimization of 3D Digital Microfluidic Biochips for the Multiplexed Polymerase Chain Reaction.” ACM Trans. Design Autom. Electr. Syst. (2016)
  62. Po-Hsun Wu, Mark Po-Hung Lin, Xin Li, and Tsung-Yi Ho. “Parasitic-Aware Common-Centroid FinFET Placement and Routing for Current-Ratio Matching.” ACM Trans. Design Autom. Electr. Syst. (2016)
  63. Yu-Wei Wu, Yiyu Shi, Sudip Roy, and Tsung-Yi Ho. “Obstacle-Avoiding Wind Turbine Placement for Power Loss and Wake Effect Optimization.” ACM Trans. Design Autom. Electr. Syst. (2016)
  64. Tsung-Yi Ho, and Bhargab B. Bhattacharya. “Guest Editors’ Introduction: Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip.” IEEE Des. Test (2015)
  65. Hailong Yao, Qin Wang, Yizhong Ru, Yici Cai, and Tsung-Yi Ho. “Integrated Flow-Control Codesign Methodology for Flow-Based Microfluidic Biochips.” IEEE Des. Test (2015)
  66. Tsun-Ming Tseng, Bing Li, Ulf Schlichtmann, and Tsung-Yi Ho. “Storage and Caching: Synthesis of Flow-Based Microfluidic Biochips.” IEEE Des. Test (2015)
  67. Yan Luo, Bhargab B. Bhattacharya, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Design and Optimization of a Cyberphysical Digital-Microfluidic Biochip for the Polymerase Chain Reaction.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2015)
  68. Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Ching-Feng Yeh, Xin Li, and Tsung-Yi Ho. “A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2015)
  69. Shang-Tsung Yu, Sheng-Han Yeh, and Tsung-Yi Ho. “Reliability-Driven Chip-Level Design for High-Frequency Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2015)
  70. Trung Anh Dinh, Shigeru Yamashita, and Tsung-Yi Ho. “An Optimal Pin-Count Design With Logic Optimization for Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2015)
  71. Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “ILP-Based Alleviation of Dense Meander Segments With Prioritized Shifting and Progressive Fixing in PCB Routing.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2015)
  72. Krishnendu Chakrabarty, Tsung-Yi Ho, and Robert Wille. “Design of Microfluidic Biochips (Dagstuhl Seminar 15352).” Dagstuhl Reports (2015)
  73. Tsung-Yi Ho “Design Automation for Digital Microfluidic Biochips.” Inf. Media Technol. (2014)
  74. Tsung-Yi Ho “Design Automation for Digital Microfluidic Biochips.” IPSJ Trans. Syst. LSI Des. Methodol. (2014)
  75. Jiun-Li Lin, Po-Hsun Wu, and Tsung-Yi Ho. “Placement optimization of flexible TFT circuits with mechanical strain and temperature consideration.” ACM J. Emerg. Technol. Comput. Syst. (2014)
  76. Ing-Chao Lin, Shun-Ming Syu, and Tsung-Yi Ho. “NBTI tolerance and leakage reduction using gate sizing.” ACM J. Emerg. Technol. Comput. Syst. (2014)
  77. Yi-Ling Hsieh, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Biochip Synthesis and Dynamic Error Recovery for Sample Preparation Using Digital Microfluidics.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
  78. Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Ching-Feng Yeh, Tsung-Yi Ho, and Bin-Da Liu. “Exploring Feasibilities of Symmetry Islands and Monotonic Current Paths in Slicing Trees for Analog Placement.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
  79. Yan Luo, Krishnendu Chakrabarty, and Tsung-Yi Ho. “Biochemistry Synthesis on a Cyberphysical Digital Microfluidics Platform Under Completion-Time Uncertainties in Fluidic Operations.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
  80. Sheng-Han Yeh, Jia-Wen Chang, Tsung-Wei Huang, Shang-Tsung Yu, and Tsung-Yi Ho. “Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
  81. Shih-Ying Sean Liu, Chung-Hung Chang, Hung-Ming Chen, and Tsung-Yi Ho. “ACER: An Agglomerative Clustering Based Electrode Addressing and Routing Algorithm for Pin-Constrained EWOD Chips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
  82. Kai Hu, Feiqiao Yu, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
  83. Hong-Ting Lin, Yi-Lin Chuang, Zong-Han Yang, and Tsung-Yi Ho. “Pulsed-Latch Utilization for Clock-Tree Power Optimization.” IEEE Trans. Very Large Scale Integr. Syst. (2014)
  84. Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, and Yuko Hara-Azumi. “Clique-Based Architectural Synthesis of Flow-Based Microfluidic Biochips.” IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2013)
  85. Po-Hsun Wu, and Tsung-Yi Ho. “Bus-driven floorplanning with thermal consideration.” Integr. (2013)
  86. Yan Luo, Krishnendu Chakrabarty, and Tsung-Yi Ho. “Error Recovery in Cyberphysical Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
  87. Jia-Wen Chang, Sheng-Han Yeh, Tsung-Wei Huang, and Tsung-Yi Ho. “Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
  88. Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen, Shun-Ren Siao, and Shu-Hung Lin. “1-D Cell Generation With Printability Enhancement.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
  89. Ying-Han Chen, Chung-Lun Hsu, Li-Chen Tsai, Tsung-Wei Huang, and Tsung-Yi Ho. “A Reliability-Oriented Placement Algorithm for Reconfigurable Digital Microfluidic Biochips Using 3-D Deferred Decision Making Technique.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
  90. Jia-Wen Chang, Sheng-Han Yeh, Tsung-Wei Huang, and Tsung-Yi Ho. “An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
  91. Yan Luo, Krishnendu Chakrabarty, and Tsung-Yi Ho. “Real-Time Error Recovery in Cyberphysical Digital-Microfluidic Biochips Using a Compact Dictionary.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
  92. Po-Hsun Wu, and Tsung-Yi Ho. “Bus-driven floorplanning with bus pin assignment and deviation minimization.” Integr. (2012)
  93. Kai-Ti Hsu, Subarna Sinha, Yu-Chuan Pi, and Tsung-Yi Ho. “A Hierarchy-Based Distributed Algorithm for Layout Geometry Operations.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2012)
  94. Yi-Ling Hsieh, Tsung-Yi Ho, and Krishnendu Chakrabarty. “A Reagent-Saving Mixing Algorithm for Preparing Multiple-Target Biochemical Samples Using Digital Microfluidics.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2012)
  95. Jing-Wei Lin, Tsung-Yi Ho, and Iris Hui-Ru Jiang. “Reliability-Driven Power/Ground Routing for Analog ICs.” ACM Trans. Design Autom. Electr. Syst. (2012)
  96. Kuan-Yu Lin, Hong-Ting Lin, Tsung-Yi Ho, and Chia-Chun Tsai. “Load-balanced clock tree synthesis with adjustable delay buffer insertion for clock skew reduction in multiple dynamic supply voltage designs.” ACM Trans. Design Autom. Electr. Syst. (2012)
  97. Tsung-Wei Huang, and Tsung-Yi Ho. “A Two-Stage Integer Linear Programming-Based Droplet Routing Algorithm for Pin-Constrained Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2011)
  98. Sheng Chou, Cheng-Shen Han, Po-Kai Huang, Ko-Fan Tien, and Tsung-Yi Ho. “An Effective and Efficient Framework for Clock Latency Range Aware Clock Network Synthesis.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2011)
  99. Tsung-Wei Huang, Shih-Yuan Yeh, and Tsung-Yi Ho. “A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2011)
  100. Tsung-Wei Huang, Chun-Hsien Lin, and Tsung-Yi Ho. “A Contamination Aware Droplet Routing Algorithm for the Synthesis of Digital Microfluidic Biochips.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2010)
  101. Tsung-Yi Ho “PIXAR: A performance-driven X-architecture router based on a novel multilevel framework.” Integr. (2009)
  102. Tsung-Yi Ho, Yao-Wen Chang, and Sao-Jie Chen. “Multilevel routing with jumper insertion for antenna avoidance.” Integr. (2006)
  103. Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen, and D. T. Lee. “Crosstalk- and performance-driven multilevel full-chip routing.” IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2005)

Conferences

  1. Shengwei An, Sheng-Yen Chou, Kaiyuan Zhang, Qiuling Xu, Guanhong Tao, Guangyu Shen, Siyuan Cheng, Shiqing Ma, Pin-Yu Chen, Tsung-Yi Ho, and Xiangyu Zhang. “Elijah: Eliminating Backdoors Injected in Diffusion Models via Distribution Shift.” In Thirty-Eighth AAAI Conference on Artificial Intelligence, AAAI 2024, Thirty-Sixth Conference on Innovative Applications of Artificial Intelligence, IAAI 2024, Fourteenth Symposium on Educational Advances in Artificial Intelligence, EAAI 2014, February 20-27, 2024, Vancouver, Canada (2024)
  2. Huayang Cai, Genggeng Liu, Wenzhong Guo, Zipeng Li, Tsung-Yi Ho, and Xing Huang. “Adaptive Control-Logic Routing for Fully Programmable Valve Array Biochips Using Deep Reinforcement Learning.” In Proceedings of the 29th Asia and South Pacific Design Automation Conference, ASPDAC 2024, Incheon, Korea, January 22-25, 2024 (2024)
  3. Genggeng Liu, Yuqin Zeng, Yuhan Zhu, Huayang Cai, Wenzhong Guo, Zipeng Li, Tsung-Yi Ho, and Xing Huang. “Towards Automated Testing of Multiplexers in Fully Programmable Valve Array Biochips.” In Proceedings of the 29th Asia and South Pacific Design Automation Conference, ASPDAC 2024, Incheon, Korea, January 22-25, 2024 (2024)
  4. Peng Xu, Jintao Li, Tsung-Yi Ho, Bei Yu, and Keren Zhu. “Performance-Driven Analog Layout Automation: Current Status and Future Directions (Invited Paper).” In Proceedings of the 29th Asia and South Pacific Design Automation Conference, ASPDAC 2024, Incheon, Korea, January 22-25, 2024 (2024)
  5. Yijun Yang, Ruiyuan Gao, Xiaosen Wang, Tsung-Yi Ho, Nan Xu, and Qiang Xu. “MMA-Diffusion: MultiModal Attack on Diffusion Models.” In IEEE/CVF Conference on Computer Vision and Pattern Recognition, CVPR 2024, Seattle, WA, USA, June 16-22, 2024 (2024)
  6. Siyan Chen, Rongliang Fu, Junying Huang, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, and Dongrui Fan. “JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2024, Valencia, Spain, March 25-27, 2024 (2024)
  7. Xing Huang, Jiaxuan Wang, Zhiwen Yu, Bin Guo, Tsung-Yi Ho, Ulf Schlichtmann, and Krishnendu Chakrabarty. “PathDriver-Wash: A Path-Driven Wash Optimization Method for Continuous-Flow Lab-on-a-Chip Systems.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2024, Valencia, Spain, March 25-27, 2024 (2024)
  8. Hongduo Liu, Peiyu Liao, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Tsung-Yi Ho, and Bei Yu. “Parallel Gröbner Basis Rewriting and Memory Optimization for Efficient Multiplier Verification.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2024, Valencia, Spain, March 25-27, 2024 (2024)
  9. Ming-Yu Chung, Sheng-Yen Chou, Chia-Mu Yu, Pin-Yu Chen, Sy-Yen Kuo, and Tsung-Yi Ho. “Rethinking Backdoor Attacks on Dataset Distillation: A Kernel Method Perspective.” In The Twelfth International Conference on Learning Representations, ICLR 2024, Vienna, Austria, May 7-11, 2024 (2024)
  10. Yan Liu, Yu Liu, Xiaokang Chen, Pin-Yu Chen, Daoguang Zan, Min-Yen Kan, and Tsung-Yi Ho. “The Devil is in the Neurons: Interpreting and Mitigating Social Biases in Language Models.” In The Twelfth International Conference on Learning Representations, ICLR 2024, Vienna, Austria, May 7-11, 2024 (2024)
  11. Hsi-Ai Tsao, Lei Hsiung, Pin-Yu Chen, Si Liu, and Tsung-Yi Ho. “AutoVP: An Automated Visual Prompting Framework and Benchmark.” In The Twelfth International Conference on Learning Representations, ICLR 2024, Vienna, Austria, May 7-11, 2024 (2024)
  12. Zhiyuan He, Yijun Yang, Pin-Yu Chen, Qiang Xu, and Tsung-Yi Ho. “Be Your Own Neighborhood: Detecting Adversarial Examples by the Neighborhood Relations Built on Self-Supervised Learning.” In Forty-first International Conference on Machine Learning, ICML 2024, Vienna, Austria, July 21-27, 2024 (2024)
  13. Shui Jiang, Rongliang Fu, Lukas Burgholzer, Robert Wille, Tsung-Yi Ho, and Tsung-Wei Huang. “FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array.” In Proceedings of the 53rd International Conference on Parallel Processing, ICPP 2024, Gotland, Sweden, August 12-15, 2024 (2024)
  14. Shuo Yin, Wenqian Zhao, Li Xie, Hong Chen, Yuzhe Ma, Tsung-Yi Ho, and Bei Yu. “FuILT: Full Chip ILT System With Boundary Healing.” In Proceedings of the 2024 International Symposium on Physical Design, ISPD 2024, Taipei, Taiwan, March 12-15, 2024 (2024)
  15. Zhengyang Ye, Zhisheng Chen, Youlin Pan, Genggeng Liu, Wenzhong Guo, Tsung-Yi Ho, and Xing Huang. “Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips.” In 25th International Symposium on Quality Electronic Design, ISQED 2024, San Francisco, CA, USA, April 3-5, 2024 (2024)
  16. Lei Hsiung, Yung-Chen Tang, Pin-Yu Chen, and Tsung-Yi Ho. “NCTV: Neural Clamping Toolkit and Visualization for Neural Network Calibration.” In Thirty-Seventh AAAI Conference on Artificial Intelligence, AAAI 2023, Thirty-Fifth Conference on Innovative Applications of Artificial Intelligence, IAAI 2023, Thirteenth Symposium on Educational Advances in Artificial Intelligence, EAAI 2023, Washington, DC, USA, February 7-14, 2023 (2023)
  17. Hao Geng, Qi Sun, Tinghuan Chen, Qi Xu, Tsung-Yi Ho, and Bei Yu. “Mixed-Type Wafer Failure Pattern Recognition.” In Proceedings of the 28th Asia and South Pacific Design Automation Conference, ASPDAC 2023, Tokyo, Japan, January 16-19, 2023 (2023)
  18. Rongliang Fu, Mengmeng Wang, Yirong Kan, Nobuyuki Yoshikawa, Tsung-Yi Ho, and Olivia Chen. “A Global Optimization Algorithm for Buffer and Splitter Insertion in Adiabatic Quantum-Flux-Parametron Circuits.” In Proceedings of the 28th Asia and South Pacific Design Automation Conference, ASPDAC 2023, Tokyo, Japan, January 16-19, 2023 (2023)
  19. Sheng-Yen Chou, Pin-Yu Chen, and Tsung-Yi Ho. “How to Backdoor Diffusion Models?.” In IEEE/CVF Conference on Computer Vision and Pattern Recognition, CVPR 2023, Vancouver, BC, Canada, June 17-24, 2023 (2023)
  20. Lei Hsiung, Yun-Yun Tsai, Pin-Yu Chen, and Tsung-Yi Ho. “Towards Compositional Adversarial Robustness: Generalizing Adversarial Training to Composite Semantic Perturbations.” In IEEE/CVF Conference on Computer Vision and Pattern Recognition, CVPR 2023, Vancouver, BC, Canada, June 17-24, 2023 (2023)
  21. Hongduo Liu, Peiyu Liao, Mengchuan Zou, Bowen Pang, Xijun Li, Mingxuan Yuan, Tsung-Yi Ho, and Bei Yu. “Layout Decomposition via Boolean Satisfiability.” In 60th ACM/IEEE Design Automation Conference, DAC 2023, San Francisco, CA, USA, July 9-13, 2023 (2023)
  22. Ziyi Wang, Siting Liu, Yuan Pu, Song Chen, Tsung-Yi Ho, and Bei Yu. “Restructure-Tolerant Timing Prediction via Multimodal Fusion.” In 60th ACM/IEEE Design Automation Conference, DAC 2023, San Francisco, CA, USA, July 9-13, 2023 (2023)
  23. Rongliang Fu, Junying Huang, Mengmeng Wang, Nobuyuki Yoshikawa, Bei Yu, Tsung-Yi Ho, and Olivia Chen. “BOMIG: A Majority Logic Synthesis Framework for AQFP Logic.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023 (2023)
  24. Shui Jiang, Seetal Potluri, and Tsung-Yi Ho. “Scalable Scan-Chain-Based Extraction of Neural Network Models.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023 (2023)
  25. Weiqing Ji, Xingcheng Yao, Hailong Yao, Tsung-Yi Ho, Ulf Schlichtmann, and Xia Yin. “SOAER: Self-Obstacle Avoiding Escape Routing for Paper-Based Digital Microfluidic Biochips.” In Proceedings of the Great Lakes Symposium on VLSI 2023, GLSVLSI 2023, Knoxville, TN, USA, June 5-7, 2023 (2023)
  26. Weiqing Ji, Hailong Yao, Tsung-Yi Ho, Ulf Schlichtmann, and Xia Yin. “GAT-based Concentration Prediction for Random Microfluidic Mixers with Multiple Input Flow Rates.” In Proceedings of the Great Lakes Symposium on VLSI 2023, GLSVLSI 2023, Knoxville, TN, USA, June 5-7, 2023 (2023)
  27. Xinda Chen, Rongliang Fu, Junying Huang, Huawei Cao, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, and Dongrui Fan. “JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ Circuits.” In Proceedings of the Great Lakes Symposium on VLSI 2023, GLSVLSI 2023, Knoxville, TN, USA, June 5-7, 2023 (2023)
  28. Shui Jiang, Tsung-Wei Huang, and Tsung-Yi Ho. “GLARE: Accelerating Sparse DNN Inference Kernels with Global Memory Access Reduction.” In IEEE High Performance Extreme Computing Conference, HPEC 2023, Boston, MA, USA, September 25-29, 2023 (2023)
  29. Zhiyang Chen, Tsung-Yi Ho, Ulf Schlichtmann, Datao Chen, Mingyu Liu, Hailong Yao, and Xia Yin. “NeuroEscape: Ordered Escape Routing via Monte-Carlo Tree Search and Neural Network.” In IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023 (2023)
  30. Rongliang Fu, Olivia Chen, Nobuyuki Yoshikawa, and Tsung-Yi Ho. “Exact Logic Synthesis for Reversible Quantum-Flux-Parametron Logic.” In IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023 (2023)
  31. Rongliang Fu, Olivia Chen, Bei Yu, Nobuyuki Yoshikawa, and Tsung-Yi Ho. “DLPlace: A Delay-Line Clocking-Based Placement Framework for AQFP Circuits.” In IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023 (2023)
  32. Chun-An Lee, Wen-Hao Liu, Gary Lin, and Tsung-Yi Ho. “Delay-Matching Routing for Advanced Packages.” In IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023 (2023)
  33. Siyuan Liang, Meng Lian, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, and Tsung-Yi Ho. “ARMM: Adaptive Reliability Quantification Model of Microfluidic Designs and its Graph-Transformer-Based Implementation.” In IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023 (2023)
  34. Zhen Zhuang, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, and Martin D. F. Wong. “Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding.” In IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023 (2023)
  35. Shui Jiang, Tsung-Wei Huang, Bei Yu, and Tsung-Yi Ho. “SNICIT: Accelerating Sparse Neural Network Inference via Compression at Inference Time on GPU.” In Proceedings of the 52nd International Conference on Parallel Processing, ICPP 2023, Salt Lake City, UT, USA, August 7-10, 2023 (2023)
  36. Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, and Evangeline F. Y. Young. “Security Closure of IC Layouts Against Hardware Trojans.” In Proceedings of the 2023 International Symposium on Physical Design, ISPD 2023, Virtual Event, USA, March 26-29, 2023 (2023)
  37. Ching-Hao Chiu, Hao-Wei Chung, Yu-Jen Chen, Yiyu Shi, and Tsung-Yi Ho. “Toward Fairness Through Fair Multi-Exit Framework for Dermatological Disease Diagnosis.” In Medical Image Computing and Computer Assisted Intervention - MICCAI 2023 - 26th International Conference, Vancouver, BC, Canada, October 8-12, 2023, Proceedings, Part III (2023)
  38. Yu-Jen Chen, Xinrong Hu, Yiyu Shi, and Tsung-Yi Ho. “AME-CAM: Attentive Multiple-Exit CAM for Weakly Supervised Segmentation on MRI Brain Tumor.” In Medical Image Computing and Computer Assisted Intervention - MICCAI 2023 - 26th International Conference, Vancouver, BC, Canada, October 8-12, 2023, Proceedings, Part I (2023)
  39. Xinrong Hu, Yu-Jen Chen, Tsung-Yi Ho, and Yiyu Shi. “Conditional Diffusion Models for Weakly Supervised Medical Image Segmentation.” In Medical Image Computing and Computer Assisted Intervention - MICCAI 2023 - 26th International Conference, Vancouver, BC, Canada, October 8-12, 2023, Proceedings, Part IV (2023)
  40. Sheng-Yen Chou, Pin-Yu Chen, and Tsung-Yi Ho. “VillanDiffusion: A Unified Backdoor Attack Framework for Diffusion Models.” In Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, NeurIPS 2023, New Orleans, LA, USA, December 10 - 16, 2023 (2023)
  41. Xiaomeng Hu, Pin-Yu Chen, and Tsung-Yi Ho. “RADAR: Robust AI-Text Detection via Adversarial Learning.” In Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, NeurIPS 2023, New Orleans, LA, USA, December 10 - 16, 2023 (2023)
  42. Yan Liu, Xiaokang Chen, Yan Gao, Zhe Su, Fengji Zhang, Daoguang Zan, Jian-Guang Lou, Pin-Yu Chen, and Tsung-Yi Ho. “Uncovering and Quantifying Social Biases in Code Generation.” In Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, NeurIPS 2023, New Orleans, LA, USA, December 10 - 16, 2023 (2023)
  43. Hsin-Chuan Huang, Chi-Chun Liang, Qining Wang, Xing Huang, Tsung-Yi Ho, and Chang-Jin Kim. “NR-Router: Non-Regular Electrode Routing with Optimal Pin Selection for Electrowetting-on-Dielectric Chips.” In 27th Asia and South Pacific Design Automation Conference, ASP-DAC 2022, Taipei, Taiwan, January 17-20, 2022 (2022)
  44. Jian-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, and Tsung-Yi Ho. “Design-for-Reliability and Probability-Based Fault Tolerance for Paper-Based Digital Microfluidic Biochips with Multiple Faults.” In 27th Asia and South Pacific Design Automation Conference, ASP-DAC 2022, Taipei, Taiwan, January 17-20, 2022 (2022)
  45. Lei Hsiung, Yung-Ju Chang, Wei-Ko Li, Tsung-Yi Ho, and Shan-Hung Wu. “A Lab-Based Investigation of Reaction Time and Reading Performance using Different In-Vehicle Reading Interfaces during Self-Driving.” In AutomotiveUI ’22: 14th International Conference on Automotive User Interfaces and Interactive Vehicular Applications, Seoul, Republic of Korea, September 17 - 20, 2022 (2022)
  46. Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Bei Yu, and Yu Huang. “Functionality matters in netlist representation learning.” In DAC ’22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022 (2022)
  47. Weiqing Ji, Xingzhuo Guo, Shouan Pan, Tsung-Yi Ho, Ulf Schlichtmann, and Hailong Yao. “GNN-based concentration prediction for random microfluidic mixers.” In DAC ’22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022 (2022)
  48. Hao Geng, Qi Xu, Tsung-Yi Ho, and Bei Yu. “PPATuner: pareto-driven tool parameter auto-tuning in physical design via gaussian process transfer learning.” In DAC ’22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022 (2022)
  49. Zhen Zhuang, Genggeng Liu, Tsung-Yi Ho, Bei Yu, and Wenzhong Guo. “TRADER: A Practical Track-Assignment-Based Detailed Router.” In 2022 Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, Antwerp, Belgium, March 14-23, 2022 (2022)
  50. Nadun Sinhabahu, Jian-De Li, Katherine Shu-Min Li, Sying-Jyan Wang, and Tsung-Yi Ho. “Trojan Insertions of Fully Programmable Valve Arrays.” In IEEE European Test Symposium, ETS 2022, Barcelona, Spain, May 23-27, 2022 (2022)
  51. Zhen Zhuang, Bei Yu, Kai-Yuan Chao, and Tsung-Yi Ho. “Multi-Package Co-Design for Chiplet Integration.” In Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022, San Diego, California, USA, 30 October 2022 - 3 November 2022 (2022)
  52. Siyuan Liang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, and Tsung-Yi Ho. “CoMUX: Combinatorial-Coding-Based High-Performance Microfluidic Control Multiplexer Design.” In Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022, San Diego, California, USA, 30 October 2022 - 3 November 2022 (2022)
  53. Lei Hsiung, Yun-Yun Tsai, Pin-Yu Chen, and Tsung-Yi Ho. “CARBEN: Composite Adversarial Robustness Benchmark.” In Proceedings of the Thirty-First International Joint Conference on Artificial Intelligence, IJCAI 2022, Vienna, Austria, 23-29 July 2022 (2022)
  54. Kaichen Yang, Tzungyu Tsai, Honggang Yu, Max Panoff, Tsung-Yi Ho, and Yier Jin. “Robust Roadside Physical Adversarial Attack Against Deep Learning in Lidar Perception Modules.” In ASIA CCS ’21: ACM Asia Conference on Computer and Communications Security, Virtual Event, Hong Kong, June 7-11, 2021 (2021)
  55. Nai-Ren Shih, and Tsung-Yi Ho. “A Multi-Commodity Network Flow Based Routing Algorithm for Paper-Based Digital Microfluidic Biochips.” In ASPDAC ’21: 26th Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 18-21, 2021 (2021)
  56. Yun-Chen Lo, Bing Li, Sooyong Park, Kwanwoo Shin, and Tsung-Yi Ho. “Interference-Free Design Methodology for Paper-Based Digital Microfluidic Biochips.” In ASPDAC ’21: 26th Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 18-21, 2021 (2021)
  57. Kuan-Ming Lai, Tsung-Wei Huang, Pei-Yu Lee, and Tsung-Yi Ho. “ATM: A High Accuracy Extracted Timing Model for Hierarchical Timing Analysis.” In ASPDAC ’21: 26th Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 18-21, 2021 (2021)
  58. Grace Li Zhang, Bing Li, Ying Zhu, Tianchen Wang, Yiyu Shi, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Tsung-Yi Ho, and Ulf Schlichtmann. “Robustness of Neuromorphic Computing with RRAM-based Crossbars and Optical Neural Networks.” In ASPDAC ’21: 26th Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 18-21, 2021 (2021)
  59. Yu-Jen Chen, Yen-Jung Chang, Shao-Cheng Wen, Xiaowei Xu, Meiping Huang, Haiyun Yuan, Jian Zhuang, Yiyu Shi, and Tsung-Yi Ho. “"One-Shot" Reduction of Additive Artifacts in Medical Images.” In IEEE International Conference on Bioinformatics and Biomedicine, BIBM 2021, Houston, TX, USA, December 9-12, 2021 (2021)
  60. Kaichen Yang, Xuan-Yi Lin, Yixin Sun, Tsung-Yi Ho, and Yier Jin. “3D-Adv: Black-Box Adversarial Attacks against Deep Learning Models through 3D Sensors.” In 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021 (2021)
  61. Fang-Chi Wu, Jian-De Li, Katherine Shu-Min Li, Sying-Jyan Wang, and Tsung-Yi Ho. “Double DQN for Chip-Level Synthesis of Paper-Based Digital Microfluidic Biochips.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021 (2021)
  62. Grace Li Zhang, Bing Li, Xing Huang, Chen Shen, Shuhang Zhang, Florin Burcea, Helmut Graeb, Tsung-Yi Ho, Hai Li, and Ulf Schlichtmann. “An Efficient Programming Framework for Memristor-based Neuromorphic Computing.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021 (2021)
  63. Wei Zhang, Yongxiao Zhou, Tsung-Yi Ho, and Hailong Yao. “Concentration Gradients Enhancement of Christmas-Tree Structure Based on a Look-Up Table.” In GLSVLSI ’21: Great Lakes Symposium on VLSI 2021, Virtual Event, USA, June 22-25, 2021 (2021)
  64. Chao-Yuan Huang, Yi-Chen Chang, Ming-Jer Tsai, and Tsung-Yi Ho. “An Optimal Algorithm for Splitter and Buffer Insertion in Adiabatic Quantum-Flux-Parametron Circuits.” In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2021, Munich, Germany, November 1-4, 2021 (2021)
  65. Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Robert Wille, Tsung-Yi Ho, and Ulf Schlichtmann. “BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems.” In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2021, Munich, Germany, November 1-4, 2021 (2021)
  66. Fangda Zuo, Mengchu Li, Tsun-Ming Tseng, Tsung-Yi Ho, and Ulf Schlichtmann. “Relative-Scheduling-Based High-Level Synthesis for Flow-Based Microfluidic Biochips.” In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2021, Munich, Germany, November 1-4, 2021 (2021)
  67. Tung-Che Liang, Jin Zhou, Yun-Sheng Chan, Tsung-Yi Ho, Krishnendu Chakrabarty, and Cy Lee. “Parallel Droplet Control in MEDA Biochips using Multi-Agent Reinforcement Learning.” In Proceedings of the 38th International Conference on Machine Learning, ICML 2021, 18-24 July 2021, Virtual Event (2021)
  68. Yu-Jen Chen, Cheng-Yen Tsai, Xiaowei Xu, Yiyu Shi, Tsung-Yi Ho, Meiping Huang, Haiyun Yuan, and Jian Zhuang. “Ct Image Denoising With Encoder-Decoder Based Graph Convolutional Networks.” In 18th IEEE International Symposium on Biomedical Imaging, ISBI 2021, Nice, France, April 13-16, 2021 (2021)
  69. Po-Cheng Tsai, Yen Ting Lu, Tsung-Yi Ho, and Ya-Tang Yang. “A standalone, programmable digital microfluidics system with multiplexor interface logic.” In 29th Mediterranean Conference on Control and Automation, MED 2021, Bari, Italy, June 22-25, 2021 (2021)
  70. Peng-Tai Huang, Xuan-Yi Lin, Yan-Jhih Wang, and Tsung-Yi Ho. “Ensemble Learning Based Electric Components Footprint Analysis.” In 3rd ACM/IEEE Workshop on Machine Learning for CAD, MLCAD 2021, Raleigh, NC, USA, August 30 - Sept. 3, 2021 (2021)
  71. M. D. Arafat Kabir, Weishiun Hung, Tsung-Yi Ho, and Yarui Peng. “Holistic and In-Context Design Flow for 2.5D Chiplet-Package Interaction Co-Optimization.” In International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021, Hsinchu, Taiwan, April 19-22, 2021 (2021)
  72. Tzungyu Tsai, Kaichen Yang, Tsung-Yi Ho, and Yier Jin. “Robust Adversarial Objects against Deep Learning Models.” In The Thirty-Fourth AAAI Conference on Artificial Intelligence, AAAI 2020, The Thirty-Second Innovative Applications of Artificial Intelligence Conference, IAAI 2020, The Tenth AAAI Symposium on Educational Advances in Artificial Intelligence, EAAI 2020, New York, NY, USA, February 7-12, 2020 (2020)
  73. Kaichen Yang, Tzungyu Tsai, Honggang Yu, Tsung-Yi Ho, and Yier Jin. “Beyond Digital Domain: Fooling Deep Learning Based Recognition System in Physical World.” In The Thirty-Fourth AAAI Conference on Artificial Intelligence, AAAI 2020, The Thirty-Second Innovative Applications of Artificial Intelligence Conference, IAAI 2020, The Tenth AAAI Symposium on Educational Advances in Artificial Intelligence, EAAI 2020, New York, NY, USA, February 7-12, 2020 (2020)
  74. Shao-Cheng Wen, Yu-Jen Chen, Zihao Liu, Wujie Wen, Xiaowei Xu, Yiyu Shi, Tsung-Yi Ho, Qianjun Jia, Meiping Huang, and Jian Zhuang. “Do Noises Bother Human and Neural Networks In the Same Way? A Medical Image Analysis Perspective.” In IEEE International Conference on Bioinformatics and Biomedicine, BIBM 2020, Virtual Event, South Korea, December 16-19, 2020 (2020)
  75. Weiqing Ji, Tsung-Yi Ho, and Hailong Yao. “Transfer Learning-Based Microfluidic Design System for Concentration Generation\(_∗\).” In 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020 (2020)
  76. Ying Zhu, Grace Li Zhang, Tianchen Wang, Bing Li, Yiyu Shi, Tsung-Yi Ho, and Ulf Schlichtmann. “Statistical Training for Neuromorphic Computing using Memristor-based Crossbars Considering Process Variations and Noise.” In 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020 (2020)
  77. Grace Li Zhang, Bing Li, Ying Zhu, Shuhang Zhang, Tianchen Wang, Yiyu Shi, Tsung-Yi Ho, Hai (Helen) Li, and Ulf Schlichtmann. “Reliable and Robust RRAM-based Neuromorphic Computing.” In GLSVLSI ’20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020 (2020)
  78. Guorong He, Chen Dong, Xing Huang, Wenzhong Guo, Ximeng Liu, and Tsung-Yi Ho. “HTcatcher: Finite State Machine and Feature Verifcation for Large-scale Neuromorphic Computing Systems.” In GLSVLSI ’20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020 (2020)
  79. Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, and Ulf Schlichtmann. “PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips.” In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020 (2020)
  80. Yi-Chen Chang, Hongjia Li, Olivia Chen, Yanzhi Wang, Nobuyuki Yoshikawa, and Tsung-Yi Ho. “ASAP: An Analytical Strategy for AQFP Placement.” In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020 (2020)
  81. Ying Zhu, Grace Li Zhang, Bing Li, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Tsung-Yi Ho, and Ulf Schlichtmann. “Countering Variations and Thermal Effects for Accurate Optical Neural Networks.” In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020 (2020)
  82. Tung-Che Liang, Zhanwei Zhong, Yaas Bigdeli, Tsung-Yi Ho, Krishnendu Chakrabarty, and Richard B. Fair. “Adaptive Droplet Routing in Digital Microfluidic Biochips Using Deep Reinforcement Learning.” In Proceedings of the 37th International Conference on Machine Learning, ICML 2020, 13-18 July 2020, Virtual Event (2020)
  83. Yun-Yun Tsai, Pin-Yu Chen, and Tsung-Yi Ho. “Transfer Learning without Knowing: Reprogramming Black-box Machine Learning Models with Scarce Data and Limited Resources.” In Proceedings of the 37th International Conference on Machine Learning, ICML 2020, 13-18 July 2020, Virtual Event (2020)
  84. Yu-Jen Chen, Yen-Jung Chang, Shao-Cheng Wen, Yiyu Shi, Xiaowei Xu, Tsung-Yi Ho, Qianjun Jia, Meiping Huang, and Jian Zhuang. “Zero-Shot Medical Image Artifact Reduction.” In 17th IEEE International Symposium on Biomedical Imaging, ISBI 2020, Iowa City, IA, USA, April 3-7, 2020 (2020)
  85. Chen Dong, Lingqing Liu, Huangda Liu, Wenzhong Guo, Xing Huang, Sihuang Lian, Ximeng Liu, and Tsung-Yi Ho. “A Survey of DMFBs Security: State-of-the-Art Attack and Defense.” In 21st International Symposium on Quality Electronic Design, ISQED 2020, Santa Clara, CA, USA, March 25-26, 2020 (2020)
  86. Jian-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, and Tsung-Yi Ho. “Watermarking for Paper-Based Digital Microfluidic Biochips.” In IEEE International Test Conference in Asia, ITC-Asia 2020, Taipei, Taiwan, September 23-25, 2020 (2020)
  87. Yun-Jie Ni, Yan-Jhih Wang, and Tsung-Yi Ho. “Footprint Classification of Electric Components on Printed Circuit Boards.” In MLCAD ’20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, Virtual Event, Iceland, November 16-20, 2020 (2020)
  88. Honggang Yu, Kaichen Yang, Teng Zhang, Yun-Yun Tsai, Tsung-Yi Ho, and Yier Jin. “CloudLeak: Large-Scale Deep Learning Models Stealing Through Adversarial Examples.” In 27th Annual Network and Distributed System Security Symposium, NDSS 2020, San Diego, California, USA, February 23-26, 2020 (2020)
  89. Tung-Che Liang, Yun-Sheng Chan, Tsung-Yi Ho, Krishnendu Chakrabarty, and Chen-Yi Lee. “Sample preparation for multiple-reactant bioassays on micro-electrode-dot-array biochips.” In Proceedings of the 24th Asia and South Pacific Design Automation Conference, ASPDAC 2019, Tokyo, Japan, January 21-24, 2019 (2019)
  90. Sheng-Hao Lin, and Tsung-Yi Ho. “Autonomous vehicle routing in multiple intersections.” In Proceedings of the 24th Asia and South Pacific Design Automation Conference, ASPDAC 2019, Tokyo, Japan, January 21-24, 2019 (2019)
  91. Kuan-Ming Lai, Tsung-Wei Huang, and Tsung-Yi Ho. “A General Cache Framework for Efficient Generation of Timing Critical Paths.” In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019 (2019)
  92. Xing Huang, Tsung-Yi Ho, Wenzhong Guo, Bing Li, and Ulf Schlichtmann. “MiniControl: Synthesis of Continuous-Flow Microfluidics with Strictly Constrained Control Ports.” In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019 (2019)
  93. Ta-Wei Huang, Yun-Yun Tsai, Chung-Wei Lin, and Tsung-Yi Ho. “Vehicle Sequence Reordering with Cooperative Adaptive Cruise Control.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019 (2019)
  94. Zhisheng Chen, Xing Huang, Wenzhong Guo, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019 (2019)
  95. Yu-Huei Lin, Tsung-Yi Ho, Bing Li, and Ulf Schlichtmann. “Block-Flushing: A Block-based Washing Algorithm for Programmable Microfluidic Devices.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019 (2019)
  96. Xing Huang, Chi-Chun Liang, Jia Li, Tsung-Yi Ho, and Chang-Jin Kim. “Open-Source Incubation Ecosystem for Digital Microfluidics - Status and Roadmap: Invited Paper.” In Proceedings of the International Conference on Computer-Aided Design, ICCAD 2019, Westminster, CO, USA, November 4-7, 2019 (2019)
  97. Mengchu Li, Tsun-Ming Tseng, Yanlu Ma, Tsung-Yi Ho, and Ulf Schlichtmann. “VOM: Flow-Path Validation and Control-Sequence Optimization for Multilayered Continuous-Flow Microfluidic Biochips.” In Proceedings of the International Conference on Computer-Aided Design, ICCAD 2019, Westminster, CO, USA, November 4-7, 2019 (2019)
  98. Tsun-Ming Tseng, Mengchu Li, Yushen Zhang, Tsung-Yi Ho, and Ulf Schlichtmann. “Cloud Columba: Accessible Design Automation Platform for Production and Inspiration: Invited Paper.” In Proceedings of the International Conference on Computer-Aided Design, ICCAD 2019, Westminster, CO, USA, November 4-7, 2019 (2019)
  99. Zhonghua Zhou, Sunmeet Chahal, Tsung-Yi Ho, and André Ivanov. “Supervised-Learning Congestion Predictor For Routability-Driven Global Routing.” In International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, April 22-25, 2019 (2019)
  100. Andreas Grimmer, Berislav Klepic, Tsung-Yi Ho, and Robert Wille. “Sound valve-control for programmable microfluidic devices.” In 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018 (2018)
  101. Guan-Ruei Lu, Bhargab B. Bhattacharya, Tsung-Yi Ho, and Hung-Ming Chen. “Multi-level droplet routing in active-matrix based digital-microfluidic biochips.” In 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018 (2018)
  102. Wenyu Sun, Yuxuan Huang, Qinghang Zhao, Fei Qiao, Tsung-Yi Ho, Xiaojun Guo, Huazhong Yang, and Yongpan Liu. “Mechanical strain and temperature aware design methodology for thin-film transistor based pseudo-CMOS logic array.” In 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018 (2018)
  103. Jian-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, and Tsung-Yi Ho. “Digital Rights Management for Paper-Based Microfluidic Biochips.” In 27th IEEE Asian Test Symposium, ATS 2018, Hefei, China, October 15-18, 2018 (2018)
  104. Tsun-Ming Tseng, Mengchu Li, Daniel Nestor Freitas, Amy Mongersun, Ismail Emre Araci, Tsung-Yi Ho, and Ulf Schlichtmann. “Columba S: a scalable co-layout design automation tool for microfluidic large-scale integration.” In Proceedings of the 55th Annual Design Automation Conference, DAC 2018, San Francisco, CA, USA, June 24-29, 2018 (2018)
  105. Chunfeng Liu, Bing Li, Tsung-Yi Ho, Krishnendu Chakrabarty, and Ulf Schlichtmann. “Design-for-testability for continuous-flow microfluidic biochips.” In Proceedings of the 55th Annual Design Automation Conference, DAC 2018, San Francisco, CA, USA, June 24-29, 2018 (2018)
  106. Guan-Ru Lai, Chun-Yu Lin, and Tsung-Yi Ho. “Pump-aware flow routing algorithm for programmable microfluidic devices.” In 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018 (2018)
  107. Pei-Yi Cheng, Kazuyoshi Takagi, and Tsung-Yi Ho. “Multi-terminal routing with length-matching for rapid single flux quantum circuits.” In Proceedings of the International Conference on Computer-Aided Design, ICCAD 2018, San Diego, CA, USA, November 05-08, 2018 (2018)
  108. Ying Zhu, Bing Li, Tsung-Yi Ho, Qin Wang, Hailong Yao, Robert Wille, and Ulf Schlichtmann. “Multi-channel and fault-tolerant control multiplexing for flow-based microfluidic biochips.” In Proceedings of the International Conference on Computer-Aided Design, ICCAD 2018, San Diego, CA, USA, November 05-08, 2018 (2018)
  109. Chunfeng Liu, Bing Li, Bhargab B. Bhattacharya, Krishnendu Chakrabarty, Tsung-Yi Ho, and Ulf Schlichtmann. “Test generation for microfluidic fully programmable valve arrays (FPVAs) with heuristic acceleration.” In 2018 International Conference on IC Design & Technology, ICICDT 2018, Otranto, Italy, June 4-6, 2018 (2018)
  110. Tsung-Yi Ho “Design Automation and Test for Flow-Based Biochips: Past Successes and Future Challenges.” In 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018, Hong Kong, China, July 8-11, 2018 (2018)
  111. Weiqing Ji, Tsung-Yi Ho, and Hailong Yao. “More Effective Randomly-Designed Microfluidics.” In 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018, Hong Kong, China, July 8-11, 2018 (2018)
  112. Chun-Yu Lin, Juinn-Dar Huang, Hailong Yao, and Tsung-Yi Ho. “A Comprehensive Security System for Digital Microfluidic Biochips.” In IEEE International Test Conference in Asia, ITC-Asia 2018, Harbin, China, August 15-17, 2018 (2018)
  113. Jia-Lin Wu, Katherine Shu-Min Li, Jain-De Li, Sying-Jyan Wang, and Tsung-Yi Ho. “SOLAR: Simultaneous optimization of control-layer pins placement and channel routing in flow-based microfluidic biochips.” In 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Hsinchu, Taiwan, April 16-19, 2018 (2018)
  114. Ching-Wei Hsieh, Zipeng Li, and Tsung-Yi Ho. “Piracy prevention of digital microfluidic biochips.” In 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017 (2017)
  115. Guan-Ruei Lu, Guan-Ming Huang, Ansuman Banerjee, Bhargab B. Bhattacharya, Tsung-Yi Ho, and Hung-Ming Chen. “On reliability hardening in cyber-physical digital-microfluidic biochips.” In 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017 (2017)
  116. Qin Wang, Shiliang Zuo, Hailong Yao, Tsung-Yi Ho, Bing Li, Ulf Schlichtmann, and Yici Cai. “Hamming-distance-based valve-switching optimization for control-layer multiplexing in flow-based microfluidic biochips.” In 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017 (2017)
  117. Andreas Grimmer, Qin Wang, Hailong Yao, Tsung-Yi Ho, and Robert Wille. “Close-to-optimal placement and routing for continuous-flow microfluidic biochips.” In 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017 (2017)
  118. Varsha Agarwal, Ananya Singla, Mahammad Samiuddin, Sudip Roy, Tsung-Yi Ho, Indranil Sengupta, and Bhargab B. Bhattacharya. “Reservoir and mixer constrained scheduling for sample preparation on digital microfluidic biochips.” In 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017 (2017)
  119. Chunfeng Liu, Bing Li, Hailong Yao, Paul Pop, Tsung-Yi Ho, and Ulf Schlichtmann. “Transport or Store?: Synthesizing Flow-based Microfluidic Biochips using Distributed Channel Storage.” In Proceedings of the 54th Annual Design Automation Conference, DAC 2017, Austin, TX, USA, June 18-22, 2017 (2017)
  120. Mengchu Li, Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Component-Oriented High-level Synthesis for Continuous-Flow Microfluidics Considering Hybrid-Scheduling.” In Proceedings of the 54th Annual Design Automation Conference, DAC 2017, Austin, TX, USA, June 18-22, 2017 (2017)
  121. Chunfeng Liu, Bing Li, Bhargab B. Bhattacharya, Krishnendu Chakrabarty, Tsung-Yi Ho, and Ulf Schlichtmann. “Testing microfluidic Fully Programmable Valve Arrays (FPVAs).” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 (2017)
  122. Wei-Lun Huang, Ankur Gupta, Sudip Roy, Tsung-Yi Ho, and Paul Pop. “Fast architecture-level synthesis of fault-tolerant flow-based microfluidic biochips.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 (2017)
  123. Yu-Jhih Chen, Sumit Sharma, Sudip Roy, and Tsung-Yi Ho. “Scheduling and optimization of genetic logic circuits on flow-based microfluidic biochips.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 (2017)
  124. Jain-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, and Tsung-Yi Ho. “Design-for-testability for paper-based digital microfluidic biochips.” In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017, Cambridge, United Kingdom, October 23-25, 2017 (2017)
  125. Lingxuan Shao, Yibin Yang, Hailong Yao, Tsung-Yi Ho, and Yici Cai. “LUTOSAP: Lookup Table Based Online Sample Preparation in Microfluidic Biochips.” In Proceedings of the on Great Lakes Symposium on VLSI 2017, Banff, AB, Canada, May 10-12, 2017 (2017)
  126. Zipeng Li, Kelvin Yi-Tse Lai, Krishnendu Chakrabarty, Tsung-Yi Ho, and Chen-Yi Lee. “Sample Preparation on Micro-Electrode-Dot-Array Digital Microfluidic Biochips.” In 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, Germany, July 3-5, 2017 (2017)
  127. Chi-Ruo Wu, Wei Wen, Tsung-Yi Ho, and Yiran Chen. “Thermal optimization for memristor-based hybrid neuromorphic computing systems.” In 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016 (2016)
  128. Qin Wang, Yizhong Ru, Hailong Yao, Tsung-Yi Ho, and Yici Cai. “Sequence-pair-based placement and routing for flow-based microfluidic biochips.” In 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016 (2016)
  129. Jain-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, and Tsung-Yi Ho. “Congestion- and timing-driven droplet routing for pin-constrained paper-based microfluidic biochips.” In 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016 (2016)
  130. Yi-Siang Su, Tsung-Yi Ho, and Der-Tsai Lee. “A routability-driven flow routing algorithm for programmable microfluidic devices.” In 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016 (2016)
  131. Sayandeep Mitra, Moumita Das, Ansuman Banerjee, Kausik Datta, and Tsung-Yi Ho. “A Verification Guided Approach for Selective Program Transformations for Approximate Computing.” In 25th IEEE Asian Test Symposium, ATS 2016, Hiroshima, Japan, November 21-24, 2016 (2016)
  132. Chun-Hao Kuo, Guan-Ruei Lu, Tsung-Yi Ho, Hung-Ming Chen, and Shiyan Hu. “Placement optimization of cyber-physical digital microfluidic biochips.” In IEEE Biomedical Circuits and Systems Conference, BioCAS 2016, Shanghai, China, October 17-19, 2016 (2016)
  133. Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Tsung-Yi Ho, Krishnendu Chakrabarty, and Chen-Yi Lee. “High-level synthesis for micro-electrode-dot-array digital microfluidic biochips.” In Proceedings of the 53rd Annual Design Automation Conference, DAC 2016, Austin, TX, USA, June 5-9, 2016 (2016)
  134. Tsun-Ming Tseng, Mengchu Li, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Columba: co-layout synthesis for continuous-flow microfluidic biochips.” In Proceedings of the 53rd Annual Design Automation Conference, DAC 2016, Austin, TX, USA, June 5-9, 2016 (2016)
  135. Mengchu Li, Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Sieve-valve-aware synthesis of flow-based microfluidic biochips considering specific biological execution limitations.” In 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016 (2016)
  136. Zhang Chen, Pingqiang Zhou, Tsung-Yi Ho, and Yier Jin. “How secure is split manufacturing in preventing hardware trojan?.” In 2016 IEEE Asian Hardware-Oriented Security and Trust, AsianHOST 2016, Yilan, Taiwan, December 19-20, 2016 (2016)
  137. Qin Wang, Zeyan Li, Haena Cheong, Oh-Sun Kwon, Hailong Yao, Tsung-Yi Ho, Kwanwoo Shin, Bing Li, Ulf Schlichtmann, and Yici Cai. “Control-fluidic CoDesign for paper-based digital microfluidic biochips.” In Proceedings of the 35th International Conference on Computer-Aided Design, ICCAD 2016, Austin, TX, USA, November 7-10, 2016 (2016)
  138. Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Miroslav Pajic, Tsung-Yi Ho, and Chen-Yi Lee. “Error recovery in a micro-electrode-dot-array digital microfluidic biochip?.” In Proceedings of the 35th International Conference on Computer-Aided Design, ICCAD 2016, Austin, TX, USA, November 7-10, 2016 (2016)
  139. Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho, and Chen-Yi Lee. “Built-in self-test for micro-electrode-dot-array digital microfluidic biochips.” In 2016 IEEE International Test Conference, ITC 2016, Fort Worth, TX, USA, November 15-17, 2016 (2016)
  140. Tsung-Yi Ho, Shigeru Yamashita, Ansuman Banerjee, and Sudip Roy. “Design of Microfluidic Biochips: Connecting Algorithms and Foundations of Chip Design to Biochemistry and the Life Sciences.” In 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016 (2016)
  141. Jain-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, and Tsung-Yi Ho. “Test and diagnosis of paper-based microfluidic biochips.” In 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016 (2016)
  142. Zipeng Li, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Design and optimization of 3D digital microfluidic biochips for the polymerase chain reaction.” In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015 (2015)
  143. Yu-Wei Wu, Yiyu Shi, Sudip Roy, and Tsung-Yi Ho. “Obstacle-avoiding wind turbine placement for power-loss and wake-effect optimization.” In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015 (2015)
  144. Ta-Yang Huang, Chia-Jui Chang, Chung-Wei Lin, Sudip Roy, and Tsung-Yi Ho. “Intra-vehicle network routing algorithm for wiring weight and wireless transmit power minimization.” In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015 (2015)
  145. Wei Wen, Chi-Ruo Wu, Xiaofang Hu, Beiye Liu, Tsung-Yi Ho, Xin Li, and Yiran Chen. “An EDA framework for large scale hybrid neuromorphic computing systems.” In Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015 (2015)
  146. Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Reliability-aware synthesis for flow-based microfluidic biochips by dynamic-device mapping.” In Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015 (2015)
  147. Hailong Yao, Tsung-Yi Ho, and Yici Cai. “PACOR: practical control-layer routing flow with length-matching constraint for flow-based microfluidic biochips.” In Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015 (2015)
  148. Po-Hsun Wu, Mark Po-Hung Lin, and Tsung-Yi Ho. “Analog layout synthesis with knowledge mining.” In European Conference on Circuit Theory and Design, ECCTD 2015, Trondheim, Norway, August 24-26, 2015 (2015)
  149. Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Testing of digital microfluidic biochips with arbitrary layouts.” In 20th IEEE European Test Symposium, ETS 2015, Cluj-Napoca, Romania, 25-29 May, 2015 (2015)
  150. Beiye Liu, Wei Wen, Yiran Chen, Xin Li, Chi-Ruo Wu, and Tsung-Yi Ho. “EDA Challenges for Memristor-Crossbar based Neuromorphic Computing.” In Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20 - 22, 2015 (2015)
  151. Tsung-Yi Ho, William H. Grover, Shiyan Hu, and Krishnendu Chakrabarty. “Cyber-physical integration in programmable microfluidic biochips.” In 33rd IEEE International Conference on Computer Design, ICCD 2015, New York City, NY, USA, October 18-21, 2015 (2015)
  152. Po-Hsun Wu, Mark Po-Hung Lin, Xin Li, and Tsung-Yi Ho. “Common-Centroid FinFET Placement Considering the Impact of Gate Misalignment.” In Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29 - April 1, 2015 (2015)
  153. Qin Wang, Weiran He, Hailong Yao, Tsung-Yi Ho, and Yici Cai. “SVM-Based Routability-Driven Chip-Level Design for Voltage-Aware Pin-Constrained EWOD Chips.” In Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29 - April 1, 2015 (2015)
  154. Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, and Krishnendu Chakrabarty. “A general testing method for digital microfluidic biochips under physical constraints.” In 2015 IEEE International Test Conference, ITC 2015, Anaheim, CA, USA, October 6-8, 2015 (2015)
  155. Trung Anh Dinh, Shigeru Yamashita, and Tsung-Yi Ho. “A network-flow-based optimal sample preparation algorithm for digital microfluidic biochips.” In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014 (2014)
  156. Kai Hu, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Wash optimization for cross-contamination removal in flow-based microfluidic biochips.” In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014 (2014)
  157. Po-Hsun Wu, Shang-Ya Bai, and Tsung-Yi Ho. “A topology-based ECO routing methodology for mask cost minimization.” In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014 (2014)
  158. Zipeng Li, Trung Anh Dinh, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Reliability-Driven Pipelined Scan-Like Testing of Digital Microfluidic Biochips.” In 23rd IEEE Asian Test Symposium, ATS 2014, Hangzhou, China, November 16-19, 2014 (2014)
  159. Kai Hu, Trung Anh Dinh, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Control-layer optimization for flow-based mVLSI microfluidic biochips.” In 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2014, Uttar Pradesh, India, October 12-17, 2014 (2014)
  160. Chun-Xun Lin, Chih-Hung Liu, I-Che Chen, D. T. Lee, and Tsung-Yi Ho. “An Efficient Bi-criteria Flow Channel Routing Algorithm For Flow-based Microfluidic Biochips.” In The 51st Annual Design Automation Conference 2014, DAC ’14, San Francisco, CA, USA, June 1-5, 2014 (2014)
  161. Oliver Keszöcze, Robert Wille, Tsung-Yi Ho, and Rolf Drechsler. “Exact One-pass Synthesis of Digital Microfluidic Biochips.” In The 51st Annual Design Automation Conference 2014, DAC ’14, San Francisco, CA, USA, June 1-5, 2014 (2014)
  162. Qin Wang, Yiren Shen, Hailong Yao, Tsung-Yi Ho, and Yici Cai. “Practical Functional and Washing Droplet Routing for Cross-Contamination Avoidance in Digital Microfluidic Biochips.” In The 51st Annual Design Automation Conference 2014, DAC ’14, San Francisco, CA, USA, June 1-5, 2014 (2014)
  163. Trung Anh Dinh, Shigeru Yamashita, and Tsung-Yi Ho. “A logic integrated optimal pin-count design for digital microfluidic biochips.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014 (2014)
  164. Sih-Sian Wu, Kanwen Wang, Sai Manoj Pudukotai Dinakarrao, Tsung-Yi Ho, Mingbin Yu, and Hao Yu. “A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os.” In Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014 (2014)
  165. Yang Liu, Shiyan Hu, and Tsung-Yi Ho. “Vulnerability assessment and defense technology for smart home cybersecurity considering pricing cyberattacks.” In The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014, San Jose, CA, USA, November 3-6, 2014 (2014)
  166. Kai-Hsiang Chen, Chi-Ruo Wu, Yue-Lin Yang, Jen-Wei Huang, and Tsung-Yi Ho. “Efficient building identification using structural and spatial information on mobile devices.” In 2013 IEEE International Conference on Multimedia and Expo Workshops, Chengdu, China, July 14-18, 2014 (2014)
  167. Sudip Roy, Chi-Ruo Wu, and Tsung-Yi Ho. “Recent trends in chip-level design automation for digital microfluidic biochips.” In 2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014 (2014)
  168. Shang-Tsung Yu, Sheng-Han Yeh, and Tsung-Yi Ho. “Reliability-driven chip-level design for high-frequency digital microfluidic biochips.” In International Symposium on Physical Design, ISPD’14, Petaluma, CA, USA, March 30 - April 02, 2014 (2014)
  169. Po-Hsun Wu, Che-Wen Chen, Chi-Ruo Wu, and Tsung-Yi Ho. “Triangle-based process hotspot classification with dummification in EUVL.” In Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014, Hsinchu, Taiwan, April 28-30, 2014 (2014)
  170. Krishnendu Chakrabarty, and Tsung-Yi Ho. “Tutorial T5: Microfluidic Biochips: Connecting VLSI and Embedded Systems to the Life Sciences.” In 2014 27th International Conference on VLSI Design, VLSID 2014, and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014 (2014)
  171. Kai Hu, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Test generation and design-for-testability for flow-based mVLSI microfluidic biochips.” In 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014 (2014)
  172. Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, and Yuko Hara-Azumi. “A clique-based approach to find binding and scheduling result in flow-based microfluidic biochips.” In 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, Japan, January 22-25, 2013 (2013)
  173. Wajid Hassan Minhass, Paul Pop, Jan Madsen, and Tsung-Yi Ho. “Control synthesis for the flow-based microfluidic large-scale integration biochips.” In 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, Japan, January 22-25, 2013 (2013)
  174. Kai-Han Tseng, Sheng-Chi You, Wajid Hassan Minhass, Tsung-Yi Ho, and Paul Pop. “A network-flow based valve-switching aware binding algorithm for flow-based microfluidic biochips.” In 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, Japan, January 22-25, 2013 (2013)
  175. Jiun-Li Lin, Po-Hsun Wu, and Tsung-Yi Ho. “A novel cell placement algorithm for flexible TFT circuit with mechanical strain and temperature consideration.” In 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, Japan, January 22-25, 2013 (2013)
  176. Yan Luo, Krishnendu Chakrabarty, and Tsung-Yi Ho. “Design of cyberphysical digital microfluidic biochips under completion-time uncertainties in fluidic operations.” In The 50th Annual Design Automation Conference 2013, DAC ’13, Austin, TX, USA, May 29 - June 07, 2013 (2013)
  177. Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, and Yu-Chuan Chen. “Lithography-aware 1-dimensional cell generation.” In 21st European Conference on Circuit Theory and Design, ECCTD 2013, Dresden, Germany, September 8-12, 2013 (2013)
  178. Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Post-route refinement for high-frequency PCBs considering meander segment alleviation.” In Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI’13, Paris, France, May 2-4, 2013 (2013)
  179. Yan Luo, Bhargab B. Bhattacharya, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Optimization of polymerase chain reaction on a cyberphysical digital microfluidic biochip.” In The IEEE/ACM International Conference on Computer-Aided Design, ICCAD’13, San Jose, CA, USA, November 18-21, 2013 (2013)
  180. Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, and Ulf Schlichtmann. “Post-route alleviation of dense meander segments in high-performance printed circuit boards.” In The IEEE/ACM International Conference on Computer-Aided Design, ICCAD’13, San Jose, CA, USA, November 18-21, 2013 (2013)
  181. Sheng-Jhih Jiang, and Tsung-Yi Ho. “A rapid analog amendment framework using the incremental floorplanning technique.” In 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013 (2013)
  182. Sukanta Bhattacharjee, Ansuman Banerjee, Tsung-Yi Ho, Krishnendu Chakrabarty, and Bhargab B. Bhattacharya. “On Producing Linear Dilution Gradient of a Sample with a Digital Microfluidic Biochip.” In 2013 International Symposium on Electronic System Design, Singapore, December 10-12, 2013 (2013)
  183. Kai-Han Tseng, Sheng-Chi You, Jhe-Yu Liou, and Tsung-Yi Ho. “A top-down synthesis methodology for flow-based microfluidic biochips considering valve-switching minimization.” In International Symposium on Physical Design, ISPD’13, Stateline, NV, USA, March 24-27, 2013 (2013)
  184. Tsung-Yi Ho, Juinn-Dar Huang, and Paul Pop. “Tutorial: Digital microfluidic biochips: Towards hardware/software co-design and cyber-physical system integration.” In 2013 IEEE International SOC Conference, Erlangen, Germany, September 4-6, 2013 (2013)
  185. Zong-Han Yang, and Tsung-Yi Ho. “Timing-aware clock gating of pulsed-latch circuits for low power design.” In 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, Hsinchu, Taiwan, April 22-24, 2013 (2013)
  186. Kai Hu, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Testing of flow-based microfluidic biochips.” In 31st IEEE VLSI Test Symposium, VTS 2013, Berkeley, CA, USA, April 29 - May 2, 2013 (2013)
  187. Jia-Wen Chang, Tsung-Wei Huang, and Tsung-Yi Ho. “An ILP-based obstacle-avoiding routing algorithm for pin-constrained EWOD chips.” In Proceedings of the 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, January 30 - February 2, 2012 (2012)
  188. Yan Luo, Krishnendu Chakrabarty, and Tsung-Yi Ho. “A cyberphysical synthesis approach for error recovery in digital microfluidic biochips.” In 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012 (2012)
  189. Sheng-Han Yeh, Jia-Wen Chang, Tsung-Wei Huang, and Tsung-Yi Ho. “Voltage-aware chip-level design for reliability-driven pin-constrained EWOD chips.” In 2012 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2012, San Jose, CA, USA, November 5-8, 2012 (2012)
  190. Yan Luo, Krishnendu Chakrabarty, and Tsung-Yi Ho. “Dictionary-based error recovery in cyberphysical digital-microfluidic biochips.” In 2012 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2012, San Jose, CA, USA, November 5-8, 2012 (2012)
  191. Po-Hsun Wu, Mark Po-Hung Lin, Yang-Ru Chen, Bing-Shiun Chou, Tung-Chieh Chen, Tsung-Yi Ho, and Bin-Da Liu. “Performance-driven analog placement considering monotonic current paths.” In 2012 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2012, San Jose, CA, USA, November 5-8, 2012 (2012)
  192. Yi-Ling Hsieh, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Design methodology for sample preparation on digital microfluidic biochips.” In 30th International IEEE Conference on Computer Design, ICCD 2012, Montreal, QC, Canada, September 30 - Oct. 3, 2012 (2012)
  193. Tsung-Wei Huang, Jia-Wen Chang, and Tsung-Yi Ho. “Integrated fluidic-chip co-design methodology for digital microfluidic biochips.” In International Symposium on Physical Design, ISPD’12, Napa, CA, USA, March 25-28, 2012 (2012)
  194. Sheng-Jhih Jiang, Chan-Liang Wu, and Tsung-Yi Ho. “A nonlinear optimization methodology for resistor matching in analog integrated circuits.” In Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, VLSI-DAT 2012, Hsinchu, Taiwan, April 23-25, 2012 (2012)
  195. Kuan-Yu Lin, Hong-Ting Lin, and Tsung-Yi Ho. “An efficient algorithm of adjustable delay buffer insertion for clock skew minimization in multiple dynamic supply voltage designs.” In Proceedings of the 16th Asia South Pacific Design Automation Conference, ASP-DAC 2011, Yokohama, Japan, January 25-27, 2011 (2011)
  196. Tsung-Yi Ho, Krishnendu Chakrabarty, and Paul Pop. “Digital microfluidic biochips: recent research and emerging challenges.” In Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2011, part of ESWeek ’11 Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011 (2011)
  197. Krishnendu Chakrabarty, Paul Pop, and Tsung-Yi Ho. “Digital microfluidic biochips: functional diversity, more than moore, and cyberphysical systems.” In Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2011, part of ESWeek ’11 Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011 (2011)
  198. Kai-Ti Hsu, Subarna Sinha, Yu-Chuan Pi, Charles C. Chiang, and Tsung-Yi Ho. “A distributed algorithm for layout geometry operations.” In Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011 (2011)
  199. Tsung-Wei Huang, Hong-Yan Su, and Tsung-Yi Ho. “Progressive network-flow based power-aware broadcast addressing for pin-constrained digital microfluidic biochips.” In Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011 (2011)
  200. Yi-Lin Chuang, Hong-Ting Lin, Tsung-Yi Ho, Yao-Wen Chang, and Diana Marculescu. “PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs.” In 2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011, San Jose, California, USA, November 7-10, 2011 (2011)
  201. Tsung-Wei Huang, Tsung-Yi Ho, and Krishnendu Chakrabarty. “Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips.” In 2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011, San Jose, California, USA, November 7-10, 2011 (2011)
  202. Hong-Ting Lin, Yi-Lin Chuang, and Tsung-Yi Ho. “Pulsed-latch-based clock tree migration for dynamic power reduction.” In Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011, Fukuoka, Japan, August 1-3, 2011 (2011)
  203. Po-Hsun Wu, and Tsung-Yi Ho. “Thermal-aware bus-driven floorplanning.” In Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011, Fukuoka, Japan, August 1-3, 2011 (2011)
  204. Ping-Hung Yuh, Cliff Chiung-Yu Lin, Tsung-Wei Huang, Tsung-Yi Ho, Chia-Lin Yang, and Yao-Wen Chang. “A SAT-based routing algorithm for cross-referencing biochips.” In 2011 International Workshop on System Level Interconnect Prediction, SLIP 2011, San Diego, CA, USA, June 5, 2011 (2011)
  205. Tsung-Wei Huang, Yan-You Lin, Jia-Wen Chang, and Tsung-Yi Ho. “Recent research and emerging challenges in design and optimization for digital microfluidic biochips.” In IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, September 26-28, 2011 (2011)
  206. Yi-Ling Hsieh, and Tsung-Yi Ho. “Automated Physical Design of Microchip-Based Capillary Electrophoresis Systems.” In VLSI Design 2011: 24th International Conference on VLSI Design, IIT Madras, Chennai, India, 2-7 January 2011 (2011)
  207. Bo-Shiun Wu, and Tsung-Yi Ho. “Bus-pin-aware bus-driven floorplanning.” In Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010 (2010)
  208. Tsung-Wei Huang, Shih-Yuan Yeh, and Tsung-Yi Ho. “A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips.” In 2010 International Conference on Computer-Aided Design, ICCAD 2010, San Jose, CA, USA, November 7-11, 2010 (2010)
  209. Tsung-Yi Ho, Jun Zeng, and Krishnendu Chakrabarty. “Digital microfluidic biochips: A vision for functional diversity and more than moore.” In 2010 International Conference on Computer-Aided Design, ICCAD 2010, San Jose, CA, USA, November 7-11, 2010 (2010)
  210. Tsung-Wei Huang, and Tsung-Yi Ho. “A two-stage ILP-based droplet routing algorithm for pin-constrained digital microfluidic biochips.” In Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010 (2010)
  211. Tsung-Yi Ho, and Sheng-Hung Liu. “Fast Legalization for Standard Cell Placement with Simultaneous Wirelength and Displacement Minimization.” In VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers (2010)
  212. Tsung-Yi Ho, and Sheng-Hung Liu. “Fast legalization for standard cell placement with simultaneous wirelength and displacement minimization.” In 18th IEEE/IFIP VLSI-SoC 2010, IEEE/IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Madrid, Spain, 27-29 September 2010 (2010)
  213. Tsung-Wei Huang, Chun-Hsien Lin, and Tsung-Yi Ho. “A contamination aware droplet routing algorithm for digital microfluidic biochips.” In 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009 (2009)
  214. Tsung-Wei Huang, and Tsung-Yi Ho. “A fast routability- and performance-driven droplet routing algorithm for digital microfluidic biochips.” In 27th International Conference on Computer Design, ICCD 2009, Lake Tahoe, CA, USA, October 4-7, 2009 (2009)
  215. Sheng Chou, and Tsung-Yi Ho. “OAL: An obstacle-aware legalization in standard cell placement with displacement minimization.” In Annual IEEE International SoC Conference, SoCC 2009, September 9-11, 2009, Belfast, Northern Ireland, UK, Proceedings (2009)
  216. Tsung-Yi Ho “A Performance-Driven Multilevel Framework for the X-Based Full-Chip Router.” In Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers (2008)
  217. Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, and Sao-Jie Chen. “Multilevel full-chip routing for the X-based architecture.” In Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005 (2005)
  218. Tsung-Yi Ho, Yao-Wen Chang, and Sao-Jie Chen. “Multilevel routing with antenna avoidance.” In Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004 (2004)
  219. Tsung-Yi Ho, Yao-Wen Chang, and Sao-Jie Chen. “Multilevel routing with jumper insertion for antenna avoidance.” In Proceedings 2004 IEEE International SOC Conference, September 12-15, 2004, Hilton Santa Clara, CA, USA (2004)
  220. Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen, and D. T. Lee. “A Fast Crosstalk- and Performance-Driven Multilevel Routing System.” In 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003 (2003)

Books

  1. Yan Luo, Krishnendu Chakrabarty, and Tsung-Yi Ho. “Hardware/Software Co-Design and Optimization for Cyberphysical Integration in Digital Microfluidic Biochips.” (2015)
  2. Tsung-Yi Ho, Yao-Wen Chang, and Sao-Jie Chen. “Full-Chip Nanometer Routing Techniques.” (2007)